H Ultra-Harmonizer®. INSTRUCTION MANUAL. Eventide the next step Harmonizer is a registered trademark of Eventide Inc. for its audio pitch shifta. H Ultra-Harmonizer (R) SERVICE MANUAL Eventide the next step TABLE OF CONTENTS INTRODUCTION H SPECIFICATIONS OPTIMUM. This is not mine. i tip my hat to the guy/guys who put in the effort to do this. Thank you sir and sirs service manual User manual.
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It is meant as a starting point in trouble shooting any problems encountered with the H in the field and to provide some insight into its capabilities. Some familiarity with its operation is necessary so refer to the H Instruction Manual eventire help with basics.
The H is a software-based, digital audio, signal processor which uses electronically balanced, stereo inputs and outputs to produce a variety of audio effects.
These range from simple time delay to pitch shifting. This allows a quicker design cycle and flexible signal processing algorithms.
H manual | Eventide
The primary goal is a stereo pitch shifter, so the architecture is based on the computational needs of pitch shifting. In addition to raw computing power the H is a flexible, software based design, the signal processors are RAM based, so that their programs are downloaded by the host microprocessor. Also, the host easily changes signal processing parameters while the signal processing programs are executing.
Finally, the signal processors address a large block of memory in order to implement long audio delay lines. A Shared Resource Multi-Processor The signal processing elements for convenience called “PELs” share most of the available resources, including the data converters, the interface to the host processor and, especially, the large block of memory for delay lines.
The architecture is built around a single “global” bus. The bus is active only when data is to be transferred between devices on the bus.
H Service Manual | Eventide
Each processor also contains words of internal data memory. The processors run at Like the TMS, the global bus has 8 read ports and 8 write ports each mapped to the various peripheral devices on the bus. The small number of port addresses severely limit the number of peripheral devices allowed on the bus. This is overcome by expanding one of the sixteen bit write ports into sixteen bit ports.
It is done by decoding the upper four data bits and using those bits to address the additional registers. Given input from the front panel and the MIDI control port, the host controls the signal processors. This includes loadinq executable code into each of the PELs, calculating and setting all signal processing? As great as the responsibilities of the host are, they are not very computationally intensive.
The host has access to the global bus, but in a more limited way than the PELs. These reaisters form – unidirectional bridge from the to the global bus.
The can write to the hnct registers, while the PELs can read from them. The delay memory cycle time is once every two processor cycles.
Since the TMS has only a 4 K word external address space and this is limited to program memory onlyspecial hardware is used to address the delay memory. The delay memory is accessed through two separate ports on the global bus. One the Delay Address Register, is a sixteen bit ‘register that controls the address of the next delay eventde cycle. The other, the Delay Data Register, is used to read or write data to the delay memory.
Thus, reading from or writing to the delay memory requires two qlobal bus accesses, the first to specify the address and evdntide second to actually read or write the Gaia. Each time a read is completed from the delay memorv the address register is incremented, allowing successive locations to be read more efficiently.
Analog Input and Output The audio input is provided by a two channel, bit analog to digital converter sampling at a rate of The converters can be set to run at the input sample rate of The control inputs to the frequency synthesizers are available on the global bus and thus can be controlled by the PELs or by the host processor.
These bits can be read and tested by the PELs. The Status Port The status port is sort of the catch-ail location in the bus design A read of the status port returns the values of a manua, of one-bit flags in the system.
Some are general purpose bits, intended for handshaking and triggering events. Writes to the status register are channeled to various reqisters depending upon the value in evetide upper 4 bits of the data word. The possible eventid include the bit registers mentioned above, the frequency synthesizer control words and interrupt lines for both the host processor and the PELs.
Bus Allocation Global bus cycle allocation is based around the input sample period. Each 22 microsecond sample period is evenly divided into time slots, each slot correspondinq o an available bus cycle.
One bus cycle per sample period is reserved for the host processor, leaving cycles available for the PELs. Also, the delay memory is unavailable eventdie 4 time slots per sample period, due to the refresh needs of its dynamic RAM.
Mnual is an exception to this rule, though. Two or more processors can access the bus simultaneously if they are reading from the same manuzl. Synchronization in this architecture takes place on several levels. The TMS has four possible internal states. In order for multiple processors to access the same bus, these states must be synchronized. If the two clocks are out of phase, this circuit cloTs aTe? The nrdTtn 3 T 6 blt ‘ np 1 t WhlCh can be used as a branch condition by the processor.
Use the “hottest” input levels possible without clipping.
A digital gain device is used in the input section which allows front panel control of levels. This device works best when it is “turned all the way up” in other words when it attenuates least. If consumer dBm levels are used, the jumpers should be moved accordingly so that your unit can operate at its optimum, high levels. For best signal to noise ratio, always set the input level control so that the top bar of the level indicators flashes from time to time, if this results in output levels that are too “hot”, reduce the output levels, not the input!
Printed circuit boards and integrated circuit chips are unfortunately often victims of abuse from well intended soldering irons. Heat and static electricity are too often responsible for electronic troubles. Extreme care should be used when working within the H Refer repairs to a qualified service person whenever possible. With a device as complex as the H there are many occasions when operator error, wiring mistakes or faulty installation account for what was thought to be a device breakdown.
A thorough under-standing of the operator’s manual will avert many operator error conditions. If the device is passing processed audio signals, displaying correct information on the front panel and reacting to the buttons and knob in most cases the H is working properly.
A good understanding of differentially balanced inputs and outputs will take care of most wiring mistakes. Faulty installations can be anything from bad audio connections, low ac line voltage or improper ventilation.
The H will get very hot if the top and bottom vent slots are blocked by other devices or the unit is in a sealed road case.
Some words about “crashing” the audio are certainly in order here. The entire unit relies on the two main address and data busses. If any component of the system fails meaning any digital chip the entire system could crash or at the very least the audio could be turned to noise and distortion. When the program running is a basic delay or a non- shifted Harmonizer and the audio output is not any facsimile of the input the audio has most likely “crashed”.
This is effectively random noise generated by such things as bus contention, wrong timing or no timing at all. It will change with different programs. Much more sophisticated gear can be helpful but these will do in most cases. Trouble-shooting the digital electronics can be a bit tough. Remember that Eventide has all the parts, equipment and information necessary to repair the H quickly. It automatically tests and logs errors for the digital circuitry.
There are also exercises for very specific hardware areas that together with an oscilloscope can greatly aid in trouble-shooting. For more information contact an Eventide dealer or Eventide directly.
Use the schematics and circuit descriptions for better understanding. Measure the CLK1S signal tor These are both test points. They will not look like textbook perfect square waves. They should not be held to eventidde strange levels.
Here is a basic procedure to follow if an analog problem is suspected. Set pitch shift to 1. Set delay parameters both to zero. Set the input and output levels on the H to OdB. Keep in mind that the left channel is almost mamual mirror image of the right.
This makes comparisons very easy. No display or no clicks or no hum. No display action upon turn-on. Only a dim backlight.
Audio crashes after warm-up. No audio at all. Blown fuse 1 amp, slo-bio. Voltage selector switch on back in wrong position. Front panel ribbon connector loose. Does the Bypass Switch operate? Press function then adjust contrast with the knob.